PhD on hardware-aware neural architecture search for brain-machine interfaces

This PhD will focus on the development of neural architecture search (NAS) methods for designing efficient, low-power neural networks tailored to neuromorphic hardware and brain decoding tasks.

Information
Brain-machine interfaces (BMIs) hold transformative potential to restore function in individuals with severe disabilities by decoding neural activity into actionable signals for communication or control. This PhD project aims to co-design algorithms and hardware for decoding motor and cognitive intent from human brain recordings, enabling next-generation assistive technologies such as speech prostheses or neural control of external devices.

Designing efficient neural networks for brain-machine interfaces (BMIs) is a challenging task that requires balancing high decoding performance with strict constraints on latency, energy, and hardware complexity. In this PhD project, we aim to automate the design of these networks using Neural Architecture Search (NAS) techniques tailored for event-driven neural networks, state-space models, and transformer-inspired architectures for brain signal decoding.

The project leverages open intracranial EEG or electrocorticography (ECoG) datasets. These datasets, increasingly available as open-access resources, provide high-resolution recordings from human participants and enable the development of generalizable and robust decoding models.

The PhD will develop NAS frameworks that can search over heterogeneous neural architectures, ranging from sparse event-driven layers to dense attention-based modules, under multiple constraints, such as memory usage, energy consumption, and latency on neuromorphic hardware. This will include:

• Differentiable and reinforcement learning-based NAS strategies;
• Hardware-aware search spaces for mixed-signal or digital VLSI accelerators;
• Multi-objective optimization to balance accuracy, energy, and communication rate;
• Integration with simulation tools for real-time neuromorphic benchmarking.

The resulting architectures will be evaluated in terms of both software-level decoding performance and hardware-level feasibility, and selected designs may be implemented in silicon as part of a larger co-design pipeline developed within the NECS lab, in collaboration with international research partners.

This research will contribute to the next generation of efficient and adaptive neural decoders that can be deployed in real-world BMIs for healthcare and assistive technology. The NAS-driven approach will allow us to scale from handcrafted prototypes to automated, data-driven model design aligned with hardware constraints, an essential step toward deployable and personalized neuroprosthetic systems.

Requirements:

• A master’s degree (or an equivalent university degree) in Electrical Engineering, Biomedical Engineering, or related background and strong hardware design skills.
• Has a background in analog mixed-signal designs, devices and general knowledge of semiconductor physics, modelling, and electronic system design.
• Has knowledge of circuit simulation and VLSI design (spice, cadence, synopsys tools).
• A research-oriented attitude, is capable of taking initiative, and has a strong problem-solving attitude.
• Ability to work in an interdisciplinary team.
• Motivated to develop your teaching skills and coach students.
• Fluent in spoken and written English (C1 level).

Salary Benefits:

• A meaningful job in a dynamic and ambitious university, in an interdisciplinary setting and within an international network. You will work on a beautiful, green campus within walking distance of the central train station. In addition, we offer you:
• Full-time employment for four years, with an intermediate assessment after nine months. You will spend a minimum of 10% of your four-year employment on teaching tasks, with a maximum of 15% per year of your employment.
• Salary and benefits (such as a pension scheme, paid pregnancy and maternity leave, partially paid parental leave) in accordance with the Collective Labour Agreement for Dutch Universities, scale P (min. € 2,901 max. € 3,707).
• A year-end bonus of 8.3% and annual vacation pay of 8%.
• High-quality training programs and other support to grow into a self-aware, autonomous scientific researcher. At TU/e we challenge you to take charge of your own learning process.
• An excellent technical infrastructure, on-campus children's day care and sports facilities.
• An allowance for commuting, working from home and internet costs.
• A Staff Immigration Team and a tax compensation scheme (the 30% facility) for international candidates.

40 hours per week

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